The present invention relates generally to the field of logic elements, and more particularly to the field of exclusive OR and exclusive NOR logic elements having alternating inputs.
FIG. 1A shows a conventional exclusive OR (XOR) circuit 100. The circuit includes eight transistors 105, 110, 115, 120, 125, 130, 135, and 140, four input signals A, B, and their corresponding inverted signals, A and B, and an output signal, OUT. The "" signal indicates an inverse operation. Two of the transistors, 105 and 125, are coupled to voltage line Vdd, and two transistors, 120 and 140, are coupled to ground line Gnd.
The eight transistors in XOR gate 100 typically occupy a large area. This, of course, reduces the number of circuits that can be placed on a single chip and increases production costs.
Some attempts have been made to improve this problem. FIG. 1B shows a conventional XOR/exclusive NOR (XNOR) gate 170 in differential form. Gate 170 includes twelve transistors, all of the transistors of gate 100 plus four more transistors, 145, 150, 155, and 160. The gate also produces another output signal, OUT. By using the differential form, gate 170 takes advantage of the overlapping use of the transistors coupled to Vdd and Gnd to reduce the number of transistors for both gates from sixteen (eight plus eight) to twelve. Gate 170, however, still occupies a large area.
Conventional XOR and XNOR circuits have other limitations. By coupling transistors directly to Vdd and Gnd to produce output levels, both XOR gate 100 and XOR/XNOR gate 170 suffer from poor transition responses. For each gate, either the Vdd line or Gnd line drives the output. When an input changes, the transistors that are conducting turn off to remove the conduction from the line currently driving the output. Other transistors, corresponding to the input transition, turn on to supply the conduction from the other line to drive the output. The transistors turning off, however, drain current from the output, thereby increasing delay. For both gates, the early part of the transition is wasted waiting for the gates of the turning on transistors to surpass the threshold. This waiting reduces the performance of the circuits.